San Jose, CA
Engineer IV
Engineer IV
Location: San Jose, CA
7-Month Assignment (potential to extend/convert)
Pay Rate: $68-70 /hour
Our client, a Fortune 200 company hard drive and data storage company, is seeking an Engineer IV to join their team. You will be responsible for the further development of concepts and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes.
Responsibilities:
- Manage and update design libraries (PDKs) used for circuit creation.
- Develop and improve tools for checking circuit designs.
- Automate tasks related to circuit design using programming languages in Cadence SKILL / SKILL++.
- Development and validation of PV tools and flows like parasitic extraction, EMIR drop and substrate noise analysis.
- Test and troubleshoot design tools and provide support to engineers.
- Collaborate with IT to ensure systems for design work smoothly.
- Maintain quality and safety standards for design tools and methods.
- Assist in developing and validating new tools and methods for circuit design.
- Manage the quality and ISO26262 requirements for the EDA tools, both for in-house developments and vendor products.
Education & Experience
- University degree (Master/PhD) in electrical engineering or a comparable subject
- Minimum 8+ years of development experience of Mixed Signal CAD design Flows from Front to Back.
- Expert knowledge and experience of state-of-the-art design tools (EDA-vendors e.g. Cadence, Synopsys, Mentor) and Software-development-methodologies and tools (Linux, script- and programming-languages as well as Cadence Skill)
- Thorough understanding of Custom Analog development flow, design tools and Software / Hardware environment
- Technical Skills: Cadence SKILL, Calibre SVRF/TVF, Python, Shell Scripting.
Please submit your resume in PDF or Word format to be considered.